Function core::arch::riscv32::sinval_vma_asid

source ·
pub unsafe fn sinval_vma_asid(asid: usize)
🔬This is a nightly-only experimental API. (stdsimd #27731)
Available on RISC-V RV32 only.
Expand description

Invalidate supervisor translation cache for given address space

This instruction invalidates any address-translation cache entries that an SFENCE.VMA instruction with the same values of vaddr and asid would invalidate.

This documentation is an old archive. Please see https://rust.docs.kernel.org instead.